refactor(emit): 寄存器号 u8→u32 全链放宽，vreg 化去 checkpoint/reg_overflow（B005）

crates/oxide_emit/src/stmt/declaration/class_decl.rs

@@ -9,7 +9,7 @@ use oxide_parser::{Statement, VariableDeclarationKind};
 impl Emitter {
     pub(crate) fn emit_class_declaration_statement(
         &self, stmt: &Statement, ctx: &mut CompileCtx,
-    ) -> Result<Option<u8>, String> {
+    ) -> Result<Option<u32>, String> {
         let Statement::ClassDeclaration(class) = stmt else {
             return Err("ClassDeclaration without name".into());
         };
@@ -23,9 +23,9 @@ impl Emitter {
         ctx.init_var(&name);
         let ctor_reg = self.emit_class(class, ctx)?;
         if let Some(&cell_idx) = ctx.captured_bindings.get(&name) {
-            ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg as u32), Operand::Imm(cell_idx as u16), Operand::None));
+            ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg), Operand::Imm(cell_idx as u16), Operand::None));
         } else {
-            ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg as u32), Operand::Reg(ctor_reg as u32), Operand::None));
+            ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg), Operand::Reg(ctor_reg), Operand::None));
         }
         Ok(None)
     }