refactor(emit): 寄存器号 u8→u32 全链放宽,vreg 化去 checkpoint/reg_overflow(B005)

This commit is contained in:
爱特每羊队
2026-08-06 16:31:16 +08:00
parent c52bf6313e
commit 38d6c7a60e
54 changed files with 404 additions and 431 deletions
@@ -9,7 +9,7 @@ use oxide_parser::{Statement, VariableDeclarationKind};
impl Emitter {
pub(crate) fn emit_class_declaration_statement(
&self, stmt: &Statement, ctx: &mut CompileCtx,
) -> Result<Option<u8>, String> {
) -> Result<Option<u32>, String> {
let Statement::ClassDeclaration(class) = stmt else {
return Err("ClassDeclaration without name".into());
};
@@ -23,9 +23,9 @@ impl Emitter {
ctx.init_var(&name);
let ctor_reg = self.emit_class(class, ctx)?;
if let Some(&cell_idx) = ctx.captured_bindings.get(&name) {
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg as u32), Operand::Imm(cell_idx as u16), Operand::None));
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg), Operand::Imm(cell_idx as u16), Operand::None));
} else {
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg as u32), Operand::Reg(ctor_reg as u32), Operand::None));
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg), Operand::Reg(ctor_reg), Operand::None));
}
Ok(None)
}
@@ -9,7 +9,7 @@ use oxide_parser::Statement;
impl Emitter {
pub(crate) fn emit_function_declaration_statement(
&self, stmt: &Statement, ctx: &mut CompileCtx,
) -> Result<Option<u8>, String> {
) -> Result<Option<u32>, String> {
let Statement::FunctionDeclaration(fd) = stmt else {
return Err("FunctionDeclaration without name".into());
};
@@ -36,11 +36,11 @@ impl Emitter {
ctx.nested.push(sub_module);
let var_reg = ctx.lookup(&name)?;
ctx.reserve_reg(var_reg);
ctx.inst(Inst::create_closure(Operand::Reg(var_reg as u32), ctx.nested.len() as u16));
ctx.inst(Inst::create_closure(Operand::Reg(var_reg), ctx.nested.len() as u16));
if let Some(&cell_idx) = ctx.captured_bindings.get(&name) {
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg as u32), Operand::Imm(cell_idx as u16), Operand::None));
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(var_reg), Operand::Imm(cell_idx as u16), Operand::None));
} else {
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg as u32), Operand::Reg(var_reg as u32), Operand::None));
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(var_reg), Operand::Reg(var_reg), Operand::None));
}
Ok(None)
}
@@ -8,7 +8,7 @@ mod function_decl;
mod var;
impl Emitter {
pub(crate) fn emit_declaration_domain(&self, stmt: &Statement, ctx: &mut CompileCtx) -> Result<Option<u8>, String> {
pub(crate) fn emit_declaration_domain(&self, stmt: &Statement, ctx: &mut CompileCtx) -> Result<Option<u32>, String> {
match stmt {
Statement::VariableDeclaration(_) => self.emit_variable_declaration_statement(stmt, ctx),
Statement::FunctionDeclaration(_) => self.emit_function_declaration_statement(stmt, ctx),
@@ -10,7 +10,7 @@ use oxide_parser::{BindingPattern, Expression, Statement, VariableDeclarationKin
impl Emitter {
pub(crate) fn emit_variable_declaration_statement(
&self, stmt: &Statement, ctx: &mut CompileCtx,
) -> Result<Option<u8>, String> {
) -> Result<Option<u32>, String> {
let Statement::VariableDeclaration(decl) = stmt else {
return Ok(None);
};
@@ -37,7 +37,7 @@ impl Emitter {
};
let idx = ctx.add_constant(Constant::Undefined);
let tmp = ctx.alloc_reg();
ctx.inst(Inst::load_const(Operand::Reg(tmp as u32), idx));
ctx.inst(Inst::load_const(Operand::Reg(tmp), idx));
let var_reg = ctx.alloc_reg();
let target_reg = if matches!(decl.kind, VariableDeclarationKind::Var) {
match ctx.declare(bi.name.as_str(), var_reg, decl.kind, is_const) {
@@ -49,9 +49,9 @@ impl Emitter {
var_reg
};
if let Some(&cell_idx) = ctx.captured_bindings.get(bi.name.as_str()) {
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(tmp as u32), Operand::Imm(cell_idx as u16), Operand::None));
ctx.inst(Inst::new(OpCode::MAKE_CELL, Operand::Reg(tmp), Operand::Imm(cell_idx as u16), Operand::None));
} else {
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(target_reg as u32), Operand::Reg(tmp as u32), Operand::None));
ctx.inst(Inst::new(OpCode::STORE_VAR, Operand::Reg(target_reg), Operand::Reg(tmp), Operand::None));
}
ctx.init_var(bi.name.as_str());
r = Some(var_reg);