fix: 模块写穿按绑定槽过滤并覆盖更新赋值路径

This commit is contained in:
2026-09-18 00:32:12 +00:00
parent f53918f287
commit 39183f449c
6 changed files with 82 additions and 15 deletions
+2
View File
@@ -474,6 +474,8 @@ impl Emitter {
}
}
}
// 逻辑赋值仅在短路通过后到达此处:写穿同步命名空间条目。
self.emit_module_write_through(name, val_reg, ctx)?;
ctx.inst(Inst::new(
OpCode::LOAD_VAR,
Operand::Reg(result_reg),